1. Field of the Invention
This invention relates to the processing of semiconductor devices, and more specifically to a low-temperature formation of silicided shallow junctions by ion implantation into thin silicon films.
2. Prior Art
There is a trend towards fabricating chips with both higher device density and more complex chip functions in the semiconductor industry. Therefore, the size of a semiconductor device should be reduced to desirable dimensions. As the size of a semiconductor device decreases, the depth of junctions between drain/source regions and the substrate region must be reduced too, otherwise, the device will fail in operation due to a large leakage or the punchthrough effect from its unsuitable junction depth.
Typically, a heavily doped P-type diffusion region is formed by implanting boron ions into an N-type semiconductor substrate, thus forming a P+-N junction. Since the boron ions are small and light, the implanted ions diffuse easily inside the silicon substrate. Therefore, the conventional P+-N junctions formed by boron ions are difficult to control in small areas.
In order to reduce the dimensions of the semiconductor devices, several methods are provided to overcome the above mentioned problems. For example, the heavily doped P-type region can be formed by implanting ions through a metal film or a silicide film over the substrate. The metal or silicide film keeps the ions therein, and the ions are driven into the substrate only after an annealing process, thus diminishing the diffusion effect of the ions and reducing the junction depth. Refer to FIG. 1A through 1C, which illustrate the process steps for forming a shallow P.sup.+ -N junction by implanting ions through a titanium layer.
Referring to FIG. 1A, a field oxide layer 12 is formed over an N-type silicon substrate 10 to define active regions. A titanium layer 14 is deposited upon silicon substrate 10 and contacts the surface of silicon substrate 10 in the active regions.
Next referring to FIG. 1B, an ion implantation step is carried out by implanting BF.sub.2.sup.+ ions into titanium layer 14.
The structure of FIG. 1B is further processed by an annealing step. Referring to FIG. 1C, a heavily doped P-type diffusion region 20 in silicon substrate 10 is formed after the annealing step. P-type diffusion region 20 is formed through the impurity drive-in effect during the recrystallization of titanium layer 14.
However, the efficiency of the impurity drive-in effect for the titanium layer is not uniform. That is, the amount of impurities driven into the silicon substrate is difficult to predict and the junction depth is beyond control. Furthermore, the annealing temperature should be higher than 700.degree. C. if a titanium layer is used, or the junction leakage current will be too high to be acceptable. Since the high annealing temperature facilitates the diffusion of impurities in the silicon substrate, the junction depth can not be well controlled. Therefore, the conventional process for forming P.sup.+ -N junctions by implanting ions through a metal film or a silicide film is not satisfactory for the fabrication of small geometry semiconductor devices.